sdram信息详情

sdram发音

意思翻译

abbr.同步动态随机存取记忆体(SynchronousDynamicrandomaccessmemory)

相似词语短语

dram vs sdram───dram与sdram

双语使用场景

For the problem of huge data storage, use SDRAM to store the data, and use FPGA to control SDRAM to complete the transpose.───为了解决数据量庞大、高速数据存取的问题,本文采用了FPGA芯片和同步动态存储器(SDRAM)来实现矩阵转置运算。

design of CPLD has adopted the output clock of image sensor to write SDRAM.───CPLD电路设计采用图像传感器的输出时钟触发sdram写过程。

Video data stream is stored into SDRAM via It's controller.───视频数据流通过该控制器接收,然后存入片外sdram中。

SDRAM should not be confused with SRAM, or static RAM, which is extremely fast and expensive memory used for processor cache memory .───(请不要把SDRAM与SRAM(静态RAM)相混淆,SRAM是速度极快且非常贵的存储器,用于处理器的缓冲存储器。)

adopting the sea-content memory SDRAM to solve the bottleneck problems between the memory space and the running speed of programs.───采用大容量的SDRAM,解决了存储空间和程序执行速度的瓶颈问题。

The control of SDRAM is relatively complicated, with the design of its controller interface circuit being the key.───由于SDRAM的控制比较复杂,因此其控制器接口电路设计是关键。

Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.───参数表模块主要实现SDRAM存储器的控制器接口,用于图像处理时读取参数信息。

A simple, modular, extensible and portable SDRAM controller program is proposed.───提出一种简便、模块化、易扩展和可移植的SDRAM控制器方案。

finally, programmable address width technique is utilized to achieve the universality of SDRAM controller.───最后采用行列地址宽度可配置技术实现SDRAM控制器的通用性。

英语使用场景

Based on the analysis of the SDRAM and DDR memory architecture, this paper presents the design principals of MBM and offers the implementation and the actual waveforms.

The SDRAM controller function module designed in this paper accesses the SDRAM with medium-high speed and accomplishes the general function.

This system consists of mass extension memory, SDRAM, LCD display and UART, etc.

This paper realizes a general SDRAM controller function module on FPGA device, which satisfying the requirements of medical imaging system.

AV video signal input into the SDRAM in the PC and then display the code above.

Alternating reading and writing of the two SDRAM that generates the jointless transmission buffer is controlled by programmable logical device FPGA.

Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.

The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP.

As mass storage body, SDRAM has extensive usable value in high data processing.