register transfer发音

意思翻译

寄存器传送

相似词语短语

register───n.登记表；声区；语体风格；调风口；现金收入记录机；学校点名册；（老师对学生的）点名登记；登记员；登记注册；套准；n.(Register)（美）雷吉斯特（人名）；v.登记；（旅馆）登记住宿；挂号邮寄；表达（意见或情感）；显示（读数）

transfer───v.转让；转接；移交；转移（地方）；（使）换乘；转存，转录；调动（工作）；传染，传播；使（运动员）转队；把（钱）转到另一账户，机构上；n.（地点的）转移；（工作的）调动；已调动的人或东西；权力的移交；运动员转会；（公共汽车、飞机等的）转移；（财产的）转让；数据的拷贝；图画，图案；转车票

register c───寄存器c

register file───[计]寄存器文件；寄存蒲；[计] 寄存器文件

register for───注册；选课；为…注册[登记]

cash register───现金出纳机，收银机；点钞机；n.<美>收银机，现金出纳机

cashier register───收银机

federal register───联邦公报；联邦登记簿；n.联邦纪事; [医]联邦文件档

register office───n.出生、结婚、死亡登记处；（办理世俗结婚手续或出生、死亡等登记的）户籍登记处

双语使用场景

RTL(register transfer level) functional verification system for package assembly function in IPOA application is illustrated in this paper.───介绍一种对IPOA应用中的组包功能进行RTL功能验证的系统。

The Register Transfer Level (RTL) behavioral descriptions are widely used in IC designs.───寄存器传输级（RTL）描述是目前应用最广泛的电路设计描述形式。

main task is translating the behavioral description of a digital system into the design of RTL(Register Transfer Level).───行为级综合，其基本任务是完成数字系统行为描述到寄存器传输级（RTL）描述的转换。

to be responsible for the annual examination, register transfer, paying bills and transact relative certifications of the vehicles.───负责车辆年检、过户、缴费及各类证明等有关手续的办理。

We base on it to establish abstract model between the sequential executable codes and the register transfer level (RTL) description.───我们依该方法在循序可执行程式码和暂存器传输层级间建立抽象模型。

Most CAD tools allow IP verification to be performed by simulating the IP cores at register transfer level (RTL) or at the gate level [4].───多数CAD工具允许IP证明由模仿进行IP核心在记数器调动水平（RTL）或在门水平[4]。

High Level Synthesis Method for Clustered Register Transfer Level Architecture───面向分模块寄存器传输级结构的高层次综合方法

Register-Transfer Level Mapping Algorithms for Memories───寄存器传输级存储器工艺映射算法

Standard for VHDL Register Transfer Level Synthesis───寄存器传输级合成用标准

英语使用场景

RTL(register transfer level) functional verification system for package assembly function in IPOA application is illustrated in this paper.

The main task is translating the behavioral description of a digital system into the design of RTL(Register Transfer Level).

The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.

High-level synthesis is also called behavioral synthesis, the main task of which is to translate the behavioral description of a digital system into the design of RTL (Register Transfer Level).

This thesis has accomplished the design of register transfer level (RTL) of every unit in the digital processing module, and passed function verification, logic synthesis, and gate level verification.

The Register Transfer Level (RTL) behavioral descriptions are widely used in IC designs.

The influence of architectures on synthesis methods is discussed, and a clustered register transfer level architecture as object architecture is presented.

And the process of functional verification consists of the implementation of RTL (register transfer level) simulation, gate level simulation and post-layout simulation in the process of design.

The input of the system is RTL (Register Transfer Language), and the knowledgebased method is used to implement the structure design, module synthesis and logic optimization.