signal timing信息详情
[通信]信号定时
signal───adj.显著的;作为信号的;n.(Signal)人名;(瑞典)西格纳尔;vt.标志;用信号通知;表示;n.信号;暗号;导火线;vi.发信号
timing differences───时间性差异
signal wire───[通信]信号线
radio signal───无线电讯号;无线电信号
forenoon timing───上午时间
timing chain───[仪]定时链
wronging timing───错误的时间
timing diagram───计时图;时间图;正时图,定时图
home signal───进站信号(机);[铁路]进站信号;[铁路]进站信号机
optimization of signal timing is an important way to improve intersection level of service.───信号配时优化是提高平面交叉口服务水平的重要途径。
So the signal timing is more reasonable.───因此,其配时方案更加合理。
This model with a fast solution method can be used for real-time signal timing.───这个模型及与之相应的快速求解算法,可以直接用于交叉口实时信号配时。
Signal timing algorithms and real-time data from mainline loop detectors are often used for more effective results.───信号配时算法以及主线车道实时检测器用来实现更高效的运行。
According to different pattern, the best timing plan can be worked out by the signal timing optimizing program and the simulated software.───针对不同的交通网络状态模式,用信号配时优化程序和仿真软件算出每种模式的最佳配时方案;
The model could be used in signal timing optimization, intersection design and drainage, transport cost analysis.───该模型可为信号交叉口的信号配时的优化、交叉口设计与渠化、运输成本分析等提供参考。
Pulsed systems using signal timing to obtain vertical distance resolution, whereas continuous wave systems rely on detector focusing.───系统采用脉冲信号配时获得的垂直距离分辨率,而连续波系统对探测器重点依赖。
The invention discloses a bus priority signal timing method based on a running schedule with the adoption of a computer program.───本发明公开了采用计算机程序的基于运行时刻表的公交优先信号配时方法。
It is critical to determine bicycle capacity at signalized intersections for signal timing design and traffic improvement.───如何确定信号控制交叉口自行车的通行能力对交叉口配时和渠化设计有重要意义。
Specifically, the network link capacity expansion problem, the road toll pricing problem and the optimal signal timing problem are discussed.
Priority is provided by optimizations of signal timing, which includes real time adjusting priority phase time, dividing priority phase and reducing non-priority phase time.
The evaluation function is optimized by genetic algorithm for obtaining the satisfying signal timing scheme.
The implementation of the general SDH device timing is introduced in this paper, which includes extracting timing signal, timing mode and controlling the SSM of signal using FPGA.
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